pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 1 features ? 1: 9 lvcmos o utput fanout buffer for dc to 150 mhz ? 8ma output drive strength ? low power consumption for portable applications ? low input- output delay ? output-output skew less than 250ps ? low additive phase jitter of 60fs rms ? 2.5v to 3.3v, 10% operation ? 1.8v 10% operation up to 67mhz ? operating temperature range from -40c to 85c ? available in 16-pin qfn green/rohs package description the pl133-97 is an advanced fanout buffer design fo r high performance, low-power, small form factor appl ic a- tions. the pl133-97 accepts a reference clock input from dc to 150mhz and provides 6 outputs of the same fr e- quency. the pl133-97 is offered in a qfn-16l 3x3mm package and it offers the best phase noise, additive jitter perfo r- mance, and lowest power consumption of any comparab le ic. the pl133-97 outputs can be disabled to a high impe d- ance (tri-state) by pulling low the oe pin. when th e oe pin is high, the outputs are enabled and follow the ref input signal. when the oe pin is left open, a pull-up res istor on the chip will default the oe pin to logic 1 so the outputs are enabled. clk8 is a free running output that remains enabled when the oe pin is pulled low. block diagram and package pinout ref clk1 clk2 clk3 clk4 clk5 clk6 qfn- 16 l oe clk8 clk7 clk9 clk4 oe clk3 gnd clk8 clk7 ref clk1 vdd gnd clk2 clk6 vdd gnd clk5 1 2 3 4 87 6 5 12 11 10 9 13 1415 16 clk9 downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 2 pin descriptions name qfn- 16l type description ref 15 i input reference frequency. clk1 1 o buffered clock output clk2 4 o buffered clock output clk3 5 o buffered clock output clk4 8 o buffered clock output clk5 9 o buffered clock output clk6 12 o buffered clock output clk7 13 o buffered clock output clk8 14 o buffered clock output, free running, does not disab le with oe. clk9 16 o buffered clock output vdd 2 , 1 1 p vdd connection gnd 3 , 7 , 1 0 p gnd connection oe 6 i output enable control input with 130k ? pull- up epad - - center pad for thermal relief. connect to gnd. downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 3 layout recommendations the following guidelines are to assist you with a p erformance optimized pcb d esign: signal integrity and termination considerations - keep traces short! - trace = inductor. with a capacitive load this eq uals ringing! - long trace = transmission line. without proper t erm i- nation this will cause reflections ( looks like rin ging ). - design long traces (> 1 inch) as striplines or m i- crostrips with defined i mpedance. - match trace at one side to avoid reflections boun c in g back and forth. decoupling and power supply co nsiderations - place decoupling capacitors as close as possible to the vdd p in(s) to limit noise from the power supply - addition of a ferrite bead in series with vdd can help prevent noise from other board sources - value of decoupling capacitor is frequency d e- pendant. typical values to use are 0.1 ? f for d e- signs using frequencies < 50mhz and 0.01 ? f for designs using frequencies > 50mhz. typical cmos termination place series resistor as close as possible to cmos output cmos output buffer ( typical buffer impedance 20 ohm) to cmos input connect a 33 ohm series resistor at each of the output clocks t o enhance the stability of the output signal 50 ohm line downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 4 absolute maximum conditions supply voltage to ground potential ...... C 0.5v to 4.6v dc input voltage ........................... v ss C 0.5v to 4.6v storage temperature ........................ C 65c to 150c junction tem per a ture.. 150c static discharge voltage (per mil-std- 883, method 3015) .. > 2000v operating conditions parameter description min. max. unit v dd supply voltage 1.62 3.6 3 v t a commercial operating temperature (ambient temperatu re) 0 70 ? c industrial operating temperature (ambient temperatu re) - 40 85 ? c c l load capacitance, below 100 mhz , v dd > 2.25v D 30 pf load capacitance between 100 mhz and 134 mhz , v dd > 2.25v D 10 pf load capacitance, above 134 mhz , v dd > 2.25v D 5 pf load capacitance, below 67mhz, 1.62v < v dd < 2.25v D 15 pf c in input capacitance D 7 pf ref, clk[1:9] operating frequency, input=output dc 150 mhz t pu power-up time for all v dd s to reach minimum specified volt age (power ramps must be monotonic) 0.05 50 ms electrical characteristics (commercial and industrial temperature devices) parameter description test conditions min. m ax. unit v il input low voltage [1] v dd > 2.25v C 0.8 v v ih input high volt age [1] v dd > 2.25v 2. 0 C v i il input low current v in = 0v C 50 a i ih input high current v in = v dd C 100 a v ol output low volt age [2] i ol = 8 ma C 0.4 v v oh output high voltage [2] i oh = C 8 ma 2.4 C v i dd supply current 66.67mhz with unloaded outputs C 32 ma r pu oe pin pull-up resistance 100 C k ? downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 5 switching characteristics (commercial and industrial temperature devices) [3] parameter description test condi ti ons min. typ. max. unit duty cycle [2] = t2 t1 measured at 1.4v , v dd =3.3v , input=50% 40 50 60 % measured at v dd /2 , input = 50% 40 50 60 % t 3 rise time [2] 0.8v ? 2.0v , v dd =3.3v , 30pf load C C 1.5 ns 10% ? 90% , v dd =2.5v , 15pf load C C 2.5 ns 10% ? 90% , v dd =1.8v , 15pf load C C 4.5 ns t 4 fall time [2] 2.0 v ? 0.8v , v dd =3.3v , 30pf load C C 1.5 ns 90% ? 10% , v dd =2.5v , 15pf load C C 2.5 ns 90% ? 10% , v dd =1.8v , 15pf load C C 4.5 ns t 5 output to output skew [2] all outputs equally loaded C C 250 ps t 6 propagation delay, ref rising edge to clkx ri sing edge [2] measured at v dd /2 1 5 9.2 ns notes: 1. ref input has a threshold voltage of v dd /2 2. parameter is guaranteed by design and characterizat ion. not 100% tested i n production. 3. all parameters are specified with loaded outputs . downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 6 noise characteristics (commercial and industrial temperature devices) parameter description test conditions min. typ. max. unit additive phase jitter v dd =3.3v, frequency=100mhz offset=12khz ~ 20mhz 60 fs -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 10 100 1000 10000 100000 1000000 10000000 100000000 phase noise (dbc/hz) offset frequency (hz) pl133-97 additive phase jitter: vdd=3.3v, clk=100mhz, integration range 12khz to 20mhz: 0.059ps typical. ref input pl133-97 output when a buffer is used to pass a signal then the buffer will add a little bit of its own noise. the phase noise on the output of the buffer will be a little bit more than the phase noise in the input signal. to quantify the noise addition in the buffer we compare the phase jitter numbers from the input and the output. the difference is called "additive phase jitter". the formula for the add it ive phase jitter is as follows: additive phase jitter = (output phase jitter) - (input phase jitter) 2 2 downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 7 switching waveforms test circuit 1.4v 1.4v t 2 t 1 vdd/2 input t 6 output vdd/2 1.4v output t 5 output 1.4v duty cycle timing all outputs rise/fall time output-output skew input-output propagation delay t 3 t 4 output 0.8v 2.0v 0v 3.3v v 0.8v 2.0v vdd vdd gnd gnd outputs c load clk 0.1 ? f 0.1 ? f downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 8 package drawing qfn- 16l symbol dimension in mm min. max. a 0.7 0.8 a1 0.05 0.05 a3 0.20 b 0.18 0. 30 d 3.00 bsc e 3.00 bsc d1 -- 1. 70 e1 -- 1.70 l 0.30 0.50 e 0.50 bsc ? seating plane a1 a3 b e1 d1 a e l d e pin 1 dot downloaded from: http:///
pl133-97 low-power dc to 150mhz 1:9 fanout buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 951 31 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 05/ 22 /1 4 page 9 micrel, inc. 2180 fortune drive san jose, ca 9 5131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to the accuracy or completeness of the information furn ished in this data sheet. this info r- mation is not intended as a warranty and micrel does not assume responsibility for its use. micrel reserves th e right to change circuitry, specifications and descriptions at any time without notice. no license , whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in micrels terms and conditions of sale for such products, micrel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including liability or w arranties relating to fitness for a particular purpose, merchantability, or infringement of any p atent, copyright or other intellectual property right. micrel products are not designed or authorized for use a s components in life support appliances, devices or sys tems where malfunction of a product can reasonably be expected to result in personal injury. l ife support devices or systems are devices or systems t hat (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. a pu r- chasers use or sale of micrel products for use in life support appliances, devices or systems is a purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ordering information for part ordering, please contact our sales departm ent: 21 80 fortune drive, san jose, ca 95131 , usa tel: (408) 944 - 0800 fax: (408) 474 -1 000 part number the order number for this device is a combination o f the following: part number, package type and operating temperature range pl133-97 x x - x part number package type q=qfn r=tape & reel temperature range c=commercial (0c to 70c) i=industrial (-40c to 85c) part/order number marking package option green (lead-free) package PL133-97QC-r p1 33 97 lll 16 -pin qfn (tape and reel) pl133- 97 qi-r p133 97i lll 16 -pin qfn (tape and reel) *note: lll designates lot number downloaded from: http:///
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